Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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198 IP
101
0.0
PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
Rambus PCIe 2.1 Controller with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 2.1 ...
102
0.0
PCIe 3.0, 2.1, 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with AMBA AXI User Interface
Rambus PCIe 3.0 with AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 3.0 with AXI is...
103
0.0
PCIe 4.0 Controller with AMBA AXI interface
Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...
104
0.0
PCIe 5.0 Controller with AMBA AXI interface
Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controlle...
105
0.0
UDP/IP Hardware Protocol Stack - 100G
The Digital Blocks DB-UDP-IP-100GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 100 GbE n...
106
0.0
UDP/IP Hardware Protocol Stack - 10G
The Digital Blocks DB-UDP-IP-10GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE net...
107
0.0
UDP/IP Hardware Protocol Stack - 1G
The Digital Blocks DB-UDP-IP-1GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE netw...
108
0.0
UDP/IP Hardware Protocol Stack - 25G
The Digital Blocks DB-UDP-IP-25GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 25 GbE net...
109
0.0
UDP/IP Hardware Protocol Stack - 40G
The Digital Blocks DB-UDP-IP-40GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...
110
0.0
UDP/IP Hardware Protocol Stack - 50G
The Digital Blocks DB-UDP-IP-50GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...
111
0.0
Advanced Encryption Standard (AES-128) core with AMBA AHB interface
The GRAES core implements the Advanced Encryption Standard (AES) symmetric encryption algorithm for high throughput application (like audio or video s...
112
0.0
Register Indirect RAM Access
The Veriest Register Indirect RAM Access Design IP provides a bridge between the embedded AMBA AHB bus and a configurable number of embedded SRAM devi...
113
0.0
RGB to CCIR 601 / 656 Encoder
The Digital Blocks DB1892AXI RGB to CCIR 601 / CCIR 656 Encoder interfaces RGB data along with synchronization signals from a LCD Controller such as D...
114
0.0
FH-OFDM Modem
...
115
0.0
AHB / AXI4 - Lite to AXI4-Stream Bridge
The MM2ST IP core bridges the streaming interfaces of a peripheral or accelerator to a memory-mapped AMBA® AHB or AXI4-Lite bus. Designed for ease ...
116
0.0
AHB 4 Channel DMA Controller
The DMA is a multiple-channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured ASIC and F...
117
0.0
AHB AES with DMA
The Advanced Encryption Standard (AES) IP Core is a complete hardware implementation encryption/decryption algorithm described in the U.S. Government ...
118
0.0
AHB Arbiter IP
SmartDV's AHB Arbiter IP is a silicon-proven, high-performance bus arbitration solution purpose-built for SoC designs requiring efficient, determinist...
119
0.0
AHB Channel with Decoder and Data Mux
The AHB Channel provides the necessary infrastructure to connect as many as 7 AHB Slaves (numbered 1-7) to an AHB bus Master. The AHB Channel perform...
120
0.0
AHB Compliant Nand Flash Controller
NAND Flash Controller has a built-in AHB Slave Interface, handles all sorts of Nand Flash commands, address & data sequences. It allows the users to a...
121
0.0
AHB Decoder IP
SmartDV's AHB Decoder IP is a silicon-proven, fully featured AMBA AHB address decode solution purpose-built for SoC designs requiring flexible, high-p...
122
0.0
AHB External Bus Interface
The AHB External Bus Interface (EBI) allows a CPU or AHB Master (such as a DMA core) to transmit and receive data to an external device such as an ext...
123
0.0
AHB Lite to AXI Bridge
The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and the...
124
0.0
AHB Low Power Subsystem - ARM Cortex M0
The AHB Low Power Subsystem is an AMBA® based system that is useful as the basic digital infrastructure for building low power SOCs. The subsystem co...
125
0.0
AHB Multilayer Interconnect
The AHB-MLIC is a multi-layer AMBA® AHB bus fabric connecting an arbitrary number of bus masters to an arbitrary number of slaves. The multilayer fa...
126
0.0
AHB Multilayer Interconnect IP
SmartDV's AHB Multilayer Interconnect IP is a silicon-proven, high-performance AMBA AHB bus fabric solution purpose-built for SoC designs requiring hi...
127
0.0
AHB Performance Subsystem - ARM Cortex M0
The AHB Performance Subsystem is an AMBA® based system that is useful as the digital infrastructure for building low power SOCs needing additional per...
128
0.0
AHB Performance Subsystem - ARM Cortex M3
The AHB Performance Subsystem is an AMBA® based system that is useful as the digital infrastructure for building low power SOCs needing additional per...
129
0.0
AHB Secure Subsystem - ARM Cortex M3
The Silvaco Secure AHB Performance Subsystem is a high-performance AHB subsystem that allows for a high level of hardware and software security. It in...
130
0.0
AHB Single Channel DMA Controller
The DMA is a configurable single channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured...
131
0.0
AHB Slave to SPI Master
The AHB-Lite to SPI Bridge is used to translate 32-bit AHB-Lite Writes and Reads to Writes and Reads over a SPI interface. A custom 32-bit protocol i...
132
0.0
AHB Subsystem
The AHB-SBS is an integrated, verified, AMBA® 3.0 interconnect and peripherals subsystem ready for embedded applications using processors with AHB bus...
133
0.0
AHB to APB Bridge
The AHB to APB bridge is an AHB slave, providing an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are...
134
0.0
AHB To APB Bridge IP
SmartDV's AHB to APB Bridge IP is a silicon-proven, fully featured protocol bridge solution purpose-built for SoC designs requiring seamless connectiv...
135
0.0
AHB to APB Bus Bridge
The AHB to APB Bridge translates an AHB bus transaction (read or write) to an APB bus transaction. This is accomplished via two small state machines ...
136
0.0
AHB to AXI Bridge IP
SmartDV's AHB to AXI Bridge IP is a silicon-proven, fully featured protocol bridge solution purpose-built for SoC designs requiring seamless connectiv...
137
0.0
AHB to AXI Bridge IP
The TrueSilicon's AHB to AXI Bridge is a high-performance protocol converter IP designed to enable seamless communication between AHB master devic...
138
0.0
AHB to Parallel Bridge for Audio CODEC
dos_AHB_parallel_bridge is a Parallel interface for Codec connection. Support for multiple channels. Each channel includes a FIFO accessible from para...
139
0.0
AHB-Lite to AHB-Lite Asynchronous Bridge
The AHB-Lite to AHB-Lite Asynchronous Bridge translates an AHB-Lite bus transaction (read or write) on one clock domain to an AHB-Lite bus transacti...
140
0.0
Bi-directional AMBA AHB/AHB bridge
The bi-directional AHB/AHB Bridge is used to interconnect high-speed and low-speed AMBA AHB buses. The bridge supports synchronous clocks with any fre...
141
0.0
Digital FIR filter with APB interface
The eSi-FIR core provides an interface to filter and decimate time interleaved multi-channel data....
142
0.0
Digital IIR filter with APB interface
A range of 5th to 11th order digital IIR filters for conditioning and optionally decimating data from an external source and to DMA the output into pr...
143
0.0
BitBLT Graphics Hardware Accelerator (AXI4 Bus)
The Digital Blocks DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to...
144
0.0
Elliptic Curve Cryptography (ECC) core with AMBA APB interface
The GRECC core implements Elliptic Curve Cryptography (ECC) which is used as a public key mechanism and is well suited for application in mobile commu...
145
0.0
DMA
The TrueSilicon DMA controller is a highly efficient hardware IP block designed to offload data movement operations from the processor to maximize ove...
146
0.0
DMA AXI4-Stream Interface to AXI Memory Map Address Space
Digital Blocks DB-AXI4-STREAM-TO-AXI4-MM-BRIDGE Verilog RTL IP Core accepts AXI4-Stream data and control input, converts the control TID to a AXI4 Mem...
147
0.0
AMBA AHB Address Trapper
The Veriest AMBA AHB Address Trapper Design IP provides a mechanism for debug of an AMBA AHB bus. This gives added visibility to the software in order...
148
0.0
AMBA AHB Simple Master Bridge
The Veriest AMBA AHB Simple Master Bridge Design IP provides a bridge between the embedded AMBA AHB bus master and a simplified generic local bus. The...
149
0.0
AMBA AHB Slave to Local Interface Bridge
The Veriest AMBA AHB Slave Bridge Design IP offers a simple solution to provide a bridge between the embedded AMBA AHB bus and a simplified generic lo...
150
0.0
AMBA AHB to APB Bus Bridge Core
The AHB2APB implements an AHB to APB bus bridge, allowing the connection of peripherals with an APB interface to an AHB bus. The highly-configurable...